Integrated circuits with memory banks often include thousands or millions of memory cells that save data for operations. The memory cells are typically very small, and may involve tens or hundreds of manufacturing processes. Perfect control of the multiple manufacturing processes at the small scales involved is challenging, and unintended electrical communication (shorts) between memory cells or other manufacturing defects may be present on some devices. The small size and high density of the memory cells and other devices combined with the large number of integrated circuits produced on a daily basis can make detection of shorts or other manufacturing defects difficult.
Process monitoring structures are included in many integrated circuit designs to help detect shorts or other manufacturing errors at the wafer level. These process monitoring structures typically include memory cells on a small scale, where these memory cells mimic the actual memory cell used for memory purposes in the integrated circuit. However, the memory cells that mimic those used for actual memory purposes (sometimes referred to as “dummy” memory cells) are not used for actual data storage within the integrated circuit. These “dummy” memory cells are typically produced in an area remote from the memory cells used for actual memory storage (i.e., “active” memory cells,) such as in a scribe line area. In some embodiments, the active and dummy memory cells may be similar, but the electronic components associated with the dummy memory cells may differ from that utilized for the active memory cells. Shorts or other manufacturing defects that manifest in the memory cells may be associated with faulty memory cells in some embodiments, but these shorts may be associated with other related structures in other embodiments. Such defects may be detected with memory bank circuitry distinct from the actual memory cells in some embodiments.
Accordingly, it is desirable to provide integrated circuits with dummy memory cells and associated circuitry that is similar or identical to active memory cells and associated circuitry, and methods for producing the same. In addition, it is desirable to provide integrated circuits with memory cell test circuits that more accurately model active memory cells within active memory bank areas. Furthermore, other desirable features and characteristics of the present embodiment will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention